The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure. Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in the present disclosure and are not admitted to be prior art by inclusion in this section.
In very large scale integration (VLSI) circuits, there are often many channels that route data signals between circuits on a printed circuit board (PCB) or integrated circuit (IC) package. Crosstalk can occur between the data signals. The crosstalk can reduce eye height and contaminate eye width, causing edge/phase variation in the data signals.